Commit 584aa9d7 584aa9d7a066294d58071e57e91dd1cb37d87b7c by Sergey Poznyakoff

(instr_nop): New function

(instr_allof, instr_anyof): Removed
1 parent beea043b
...@@ -31,6 +31,14 @@ ...@@ -31,6 +31,14 @@
31 && (m)->debug_printer) 31 && (m)->debug_printer)
32 #define INSTR_DISASS(m) ((m)->debug_level & MU_SIEVE_DEBUG_DISAS) 32 #define INSTR_DISASS(m) ((m)->debug_level & MU_SIEVE_DEBUG_DISAS)
33 33
34 void
35 instr_nop (sieve_machine_t mach)
36 {
37 if (INSTR_DEBUG (mach))
38 sieve_debug (mach, "%4lu: NOP\n",
39 (unsigned long) (mach->pc - 1));
40 }
41
34 static int 42 static int
35 instr_run (sieve_machine_t mach) 43 instr_run (sieve_machine_t mach)
36 { 44 {
...@@ -113,99 +121,70 @@ instr_pop (sieve_machine_t mach) ...@@ -113,99 +121,70 @@ instr_pop (sieve_machine_t mach)
113 } 121 }
114 122
115 void 123 void
116 instr_allof (sieve_machine_t mach) 124 instr_not (sieve_machine_t mach)
117 { 125 {
118 int num = SIEVE_ARG (mach, 0, number);
119 int val = 1;
120
121 SIEVE_ADJUST(mach, 1);
122
123 if (INSTR_DEBUG (mach)) 126 if (INSTR_DEBUG (mach))
124 { 127 {
125 sieve_debug (mach, "%4lu: ALLOF %d\n", (unsigned long)(mach->pc - 2), 128 sieve_debug (mach, "%4lu: NOT\n", (unsigned long)(mach->pc - 1));
126 num);
127 if (INSTR_DISASS (mach)) 129 if (INSTR_DISASS (mach))
128 return; 130 return;
129 } 131 }
130 132 mach->reg = !mach->reg;
131 while (num-- > 0)
132 {
133 instr_pop (mach);
134 val &= mach->reg;
135 }
136 mach->reg = val;
137 } 133 }
138 134
139 void 135 void
140 instr_anyof (sieve_machine_t mach) 136 instr_branch (sieve_machine_t mach)
141 { 137 {
142 int num = SIEVE_ARG (mach, 0, number); 138 long num = SIEVE_ARG (mach, 0, number);
143 int val = 0;
144
145 SIEVE_ADJUST(mach, 1);
146 139
140 SIEVE_ADJUST (mach, 1);
147 if (INSTR_DEBUG (mach)) 141 if (INSTR_DEBUG (mach))
148 { 142 {
149 sieve_debug (mach, "%4lu: ANYOF %d\n", (unsigned long)(mach->pc - 2), 143 sieve_debug (mach, "%4lu: BRANCH %lu\n",
150 num); 144 (unsigned long)(mach->pc-2),
145 (unsigned long)(mach->pc + num));
151 if (INSTR_DISASS (mach)) 146 if (INSTR_DISASS (mach))
152 return; 147 return;
153 } 148 }
154 149
155 while (num-- > 0) 150 mach->pc += num;
156 {
157 instr_pop (mach);
158 val |= mach->reg;
159 }
160 mach->reg = val;
161 }
162
163 void
164 instr_not (sieve_machine_t mach)
165 {
166 if (INSTR_DEBUG (mach))
167 {
168 sieve_debug (mach, "%4lu: NOT\n", (unsigned long)(mach->pc - 1));
169 if (INSTR_DISASS (mach))
170 return;
171 }
172 mach->reg = !mach->reg;
173 } 151 }
174 152
175 void 153 void
176 instr_branch (sieve_machine_t mach) 154 instr_brz (sieve_machine_t mach)
177 { 155 {
178 long num = SIEVE_ARG (mach, 0, number); 156 long num = SIEVE_ARG (mach, 0, number);
179
180 SIEVE_ADJUST (mach, 1); 157 SIEVE_ADJUST (mach, 1);
158
181 if (INSTR_DEBUG (mach)) 159 if (INSTR_DEBUG (mach))
182 { 160 {
183 sieve_debug (mach, "%4lu: BRANCH %lu\n", 161 sieve_debug (mach, "%4lu: BRZ %lu\n",
184 (unsigned long)(mach->pc-2), 162 (unsigned long)(mach->pc-2),
185 (unsigned long)(mach->pc + num)); 163 (unsigned long)(mach->pc + num));
186 if (INSTR_DISASS (mach)) 164 if (INSTR_DISASS (mach))
187 return; 165 return;
188 } 166 }
189 167
168 if (!mach->reg)
190 mach->pc += num; 169 mach->pc += num;
191 } 170 }
192 171
193 void 172 void
194 instr_brz (sieve_machine_t mach) 173 instr_brnz (sieve_machine_t mach)
195 { 174 {
196 long num = SIEVE_ARG (mach, 0, number); 175 long num = SIEVE_ARG (mach, 0, number);
197 SIEVE_ADJUST (mach, 1); 176 SIEVE_ADJUST (mach, 1);
198 177
199 if (INSTR_DEBUG (mach)) 178 if (INSTR_DEBUG (mach))
200 { 179 {
201 sieve_debug (mach, "%4lu: BRZ %lu\n", 180 sieve_debug (mach, "%4lu: BRNZ %lu\n",
202 (unsigned long)(mach->pc-2), 181 (unsigned long)(mach->pc-2),
203 (unsigned long)(mach->pc + num)); 182 (unsigned long)(mach->pc + num));
204 if (INSTR_DISASS (mach)) 183 if (INSTR_DISASS (mach))
205 return; 184 return;
206 } 185 }
207 186
208 if (!mach->reg) 187 if (mach->reg)
209 mach->pc += num; 188 mach->pc += num;
210 } 189 }
211 190
......